Field of the Invention
The present invention relates to information handling systems and more particularly to an optimized two-socket/four-socket server architecture.
Description of the Related Art
As the value and use of information continues to increase, individuals and businesses seek additional ways to process and store information. One option available to users is information handling systems. An information handling system generally processes, compiles, stores, and/or communicates information or data for business, personal, or other purposes thereby allowing users to take advantage of the value of the information. Because technology and information handling needs and requirements vary between different users or applications, information handling systems may also vary regarding what information is handled, how the information is handled, how much information is processed, stored, or communicated, and how quickly and efficiently the information may be processed, stored, or communicated. The variations in information handling systems allow for information handling systems to be general or configured for a specific user or specific use such as financial transaction processing, airline reservations, enterprise data storage, or global communications. In addition, information handling systems may include a variety of hardware and software components that may be configured to process, store, and communicate information and may include one or more computer systems, data storage systems, and networking systems.
Information handling systems are known which use a two socket (2S) server architecture. Information handling systems are also known which use a four socket (4S) server architecture. For example, referring to FIG. 1, a block diagram of an information handling system having a 4S topology using multi-processor (MP) type processors is shown.
FIG. 1B, labeled Prior Art, shows an example block diagram of an information handling system in which only the lower two sockets are populated with dual processor (DP) type processors. Leaving the upper sockets unpopulated is a valid bootable configuration, but can result in some unused connections (i.e., links) between sockets. Such a system has potentially reduced performance compared to a dedicated 2S design where all available connections are used.
FIG. 1C, labeled Prior Art, shows an example of a two socket topology with two direct connected links. In this topology, in addition to the link C connection, the link A and link B links of the processor are also connected. This topology thus provides a fully utilized lane assignment for a two socket topology. FIG. 1D, labeled Prior Art, shows an example of a four socket topology with two direct connected links. In this topology, in addition to the link C connection, the link A and link B links of the processor are also connected. This topology thus provides a fully utilized lane assignment for a four socket topology.
It is known to use loopback cables, connectors or modules (all generally referred to as loopback slugs) to provide connectivity for testing purposes.
It would be desirable to provide an information handling system design which could leverage design resources, cost, risk and time to market while providing a 2S/4S system. Challenges associated with providing such a system include cost of burden or unused components as well as potentially reduced performance compared to a dedicated 2S design due to missing connections.